Samuel Huang c2c8ec302e Fix dclk as DFF trigger clock

2021-11-26 18:16:05 +08:00

..

ip

Change syntax of parameter-parity_table from SystemVerilog to Verilog.

2021-11-26 18:11:04 +08:00

.DS_Store

Initial commit

2021-11-26 17:16:16 +08:00

KeyboardConstraints.xdc

Initial commit

2021-11-26 17:16:16 +08:00

KeyboardDecoder.v

Fix if-else problem

2021-11-26 17:45:57 +08:00

OnePulse.v

Initial commit

2021-11-26 17:16:16 +08:00

SampleDisplay.v

C1) hange syntax of KEYCODE-parameter from SystemVerilog to Verilog. 2) Fix if-else problem

2021-11-26 17:59:29 +08:00

SevenSegment.v

Fix dclk as DFF trigger clock

2021-11-26 18:16:05 +08:00