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Change syntax of parameter-parity_table from SystemVerilog to Verilog.

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Samuel Huang 2021-11-26 18:11:04 +08:00
parent e8ee999e8f
commit dd4aa79cfd
1 changed files with 1 additions and 1 deletions
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Keyboard Sample Code/ip/Keyboard-Controller/keyboard_cntr_1.0/src/Ps2Interface.v
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@ -193,7 +193,7 @@ module Ps2Interface#(
parameter DEBOUNCE_DELAY = 15;
parameter BITS_NUM = 11;
parameter [0:0] parity_table [0:255] = { //(odd) parity bit table, used instead of logic because this way speed is far greater
parameter [0:255] parity_table = { //(odd) parity bit table, used instead of logic because this way speed is far greater
1'b1,1'b0,1'b0,1'b1,1'b0,1'b1,1'b1,1'b0,
1'b0,1'b1,1'b1,1'b0,1'b1,1'b0,1'b0,1'b1,
1'b0,1'b1,1'b1,1'b0,1'b1,1'b0,1'b0,1'b1,