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[Feature] show scan code on 7-segment

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This commit is contained in:
Tony Yang 2021-11-28 22:30:44 +08:00
parent bd88e52694
commit 36686d8f1a
Signed by: t510599
GPG Key ID: D88388851C28715D
3 changed files with 99 additions and 142 deletions
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4
Keyboard Sample Code/KeyboardConstraints.xdc
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@ -19,8 +19,8 @@ set_property PACKAGE_PIN V5 [get_ports {display[5]}]
set_property PACKAGE_PIN U7 [get_ports {display[6]}] set_property PACKAGE_PIN U7 [get_ports {display[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {display[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {display[6]}]
#set_property PACKAGE_PIN V7 [get_ports dp] # set_property PACKAGE_PIN V7 [get_ports dp]
#set_property IOSTANDARD LVCMOS33 [get_ports dp] # set_property IOSTANDARD LVCMOS33 [get_ports dp]
set_property PACKAGE_PIN U2 [get_ports {digit[0]}] set_property PACKAGE_PIN U2 [get_ports {digit[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {digit[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {digit[0]}]

97
Keyboard Sample Code/SampleDisplay.v
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@ -5,49 +5,27 @@ module SampleDisplay(
inout wire PS2_CLK, inout wire PS2_CLK,
input wire rst, input wire rst,
input wire clk input wire clk
); );
wire reset;
parameter [8:0] LEFT_SHIFT_CODES = 9'b0_0001_0010; reg [7:0] scan_code, nxt_scan_code;
parameter [8:0] RIGHT_SHIFT_CODES = 9'b0_0101_1001;
parameter [8:0] KEY_CODES_00 = 9'b0_0100_0101; // 0 => 45
parameter [8:0] KEY_CODES_01 = 9'b0_0001_0110; // 1 => 16
parameter [8:0] KEY_CODES_02 = 9'b0_0001_1110; // 2 => 1E
parameter [8:0] KEY_CODES_03 = 9'b0_0010_0110; // 3 => 26
parameter [8:0] KEY_CODES_04 = 9'b0_0010_0101; // 4 => 25
parameter [8:0] KEY_CODES_05 = 9'b0_0010_1110; // 5 => 2E
parameter [8:0] KEY_CODES_06 = 9'b0_0011_0110; // 6 => 36
parameter [8:0] KEY_CODES_07 = 9'b0_0011_1101; // 7 => 3D
parameter [8:0] KEY_CODES_08 = 9'b0_0011_1110; // 8 => 3E
parameter [8:0] KEY_CODES_09 = 9'b0_0100_0110; // 9 => 46
parameter [8:0] KEY_CODES_10 = 9'b0_0111_0000; // right_0 => 70
parameter [8:0] KEY_CODES_11 = 9'b0_0110_1001; // right_1 => 69
parameter [8:0] KEY_CODES_12 = 9'b0_0111_0010; // right_2 => 72
parameter [8:0] KEY_CODES_13 = 9'b0_0111_1010; // right_3 => 7A
parameter [8:0] KEY_CODES_14 = 9'b0_0110_1011; // right_4 => 6B
parameter [8:0] KEY_CODES_15 = 9'b0_0111_0011; // right_5 => 73
parameter [8:0] KEY_CODES_16 = 9'b0_0111_0100; // right_6 => 74
parameter [8:0] KEY_CODES_17 = 9'b0_0110_1100; // right_7 => 6C
parameter [8:0] KEY_CODES_18 = 9'b0_0111_0101; // right_8 => 75
parameter [8:0] KEY_CODES_19 = 9'b0_0111_1101; // right_9 => 7D
reg [15:0] nums, next_nums;
reg [3:0] key_num;
reg [9:0] last_key;
wire shift_down;
wire [511:0] key_down; wire [511:0] key_down;
wire [8:0] last_change; wire [8:0] last_change;
wire been_ready; wire been_ready;
assign shift_down = (key_down[LEFT_SHIFT_CODES] == 1'b1 || key_down[RIGHT_SHIFT_CODES] == 1'b1) ? 1'b1 : 1'b0; OnePulse one_pulse(
.signal_single_pulse(reset),
.signal(rst),
.clock(clk)
);
SevenSegment seven_seg ( SegmentController controller (
.display(display), .clk(clk),
.digit(digit), .rst_n(!reset),
.nums(nums), .signal({(last_change[8] ? 8'hE0 : 8'd0), scan_code}),
.rst(rst), .seg(display),
.clk(clk) .seg_an(digit)
); );
KeyboardDecoder key_de ( KeyboardDecoder key_de (
@ -56,54 +34,21 @@ module SampleDisplay(
.key_valid(been_ready), .key_valid(been_ready),
.PS2_DATA(PS2_DATA), .PS2_DATA(PS2_DATA),
.PS2_CLK(PS2_CLK), .PS2_CLK(PS2_CLK),
.rst(rst), .rst(reset),
.clk(clk) .clk(clk)
); );
always @ (posedge clk, posedge rst) begin always @ (posedge clk, posedge reset) begin
if (rst) begin if (reset) begin
nums <= 16'b0; scan_code <= 16'd0;
end else begin end else begin
nums <= next_nums; scan_code <= nxt_scan_code;
end end
end end
always @ (*) begin
next_nums = nums;
if (been_ready && key_down[last_change] == 1'b1) begin
if (key_num != 4'b1111) begin
if (shift_down == 1'b1) begin
next_nums = {key_num, nums[15:4]};
end else begin
next_nums = {nums[11:0], key_num};
end
end else next_nums = next_nums;
end else next_nums = next_nums;
end
always @ (*) begin always @ (*) begin
case (last_change) if (been_ready && key_down[last_change] == 1'b1) nxt_scan_code = last_change[7:0];
KEY_CODES_00 : key_num = 4'b0000; else nxt_scan_code = scan_code;
KEY_CODES_01 : key_num = 4'b0001;
KEY_CODES_02 : key_num = 4'b0010;
KEY_CODES_03 : key_num = 4'b0011;
KEY_CODES_04 : key_num = 4'b0100;
KEY_CODES_05 : key_num = 4'b0101;
KEY_CODES_06 : key_num = 4'b0110;
KEY_CODES_07 : key_num = 4'b0111;
KEY_CODES_08 : key_num = 4'b1000;
KEY_CODES_09 : key_num = 4'b1001;
KEY_CODES_10 : key_num = 4'b0000;
KEY_CODES_11 : key_num = 4'b0001;
KEY_CODES_12 : key_num = 4'b0010;
KEY_CODES_13 : key_num = 4'b0011;
KEY_CODES_14 : key_num = 4'b0100;
KEY_CODES_15 : key_num = 4'b0101;
KEY_CODES_16 : key_num = 4'b0110;
KEY_CODES_17 : key_num = 4'b0111;
KEY_CODES_18 : key_num = 4'b1000;
KEY_CODES_19 : key_num = 4'b1001;
default : key_num = 4'b1111;
endcase
end end
endmodule endmodule

134
Keyboard Sample Code/SevenSegment.v
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@ -1,69 +1,81 @@
module SevenSegment( module ClockDivider #(
output reg [6:0] display, parameter N = 20
output reg [3:0] digit, ) (
input wire [15:0] nums, input clk,
input wire rst, input rst_n,
input wire clk output reg dclk
); );
reg [N-1:0] dff;
reg [15:0] clk_divider; always @(posedge clk) begin
reg [3:0] display_num; if (!rst_n) begin
dff <= {N{1'b0}};
always @ (posedge clk, posedge rst) begin
if (rst) begin
clk_divider <= 16'b0;
end else begin end else begin
clk_divider <= clk_divider + 16'b1; dff <= dff + 1'b1;
dclk <= &dff;
end
end
endmodule
module SegmentController (
input clk,
input rst_n,
input [15:0] signal,
output [6:0] seg,
output [3:0] seg_an
);
wire dclk;
wire [3:0] seg_en;
reg [1:0] cnt;
reg [6:0] seg_inv;
reg [3:0] digit;
ClockDivider #(.N(16)) display(clk, rst_n, dclk);
always @(posedge clk) begin
if (!rst_n) begin
cnt <= 4'd0;
end else if (dclk) begin
cnt <= cnt + 1'b1;
end else begin
cnt <= cnt;
end end
end end
always @ (posedge clk, posedge rst) begin always @(*) begin
if (rst) begin case (cnt)
display_num <= 4'b0000; 2'd0: digit = signal[3:0];
digit <= 4'b1111; 2'd1: digit = signal[7:4];
end else if (clk_divider == {16{1'b1}}) begin 2'd2: digit = signal[11:8];
case (digit) 2'd3: digit = signal[15:12];
4'b1110 : begin default: digit = 4'd0;
display_num <= nums[7:4];
digit <= 4'b1101;
end
4'b1101 : begin
display_num <= nums[11:8];
digit <= 4'b1011;
end
4'b1011 : begin
display_num <= nums[15:12];
digit <= 4'b0111;
end
4'b0111 : begin
display_num <= nums[3:0];
digit <= 4'b1110;
end
default : begin
display_num <= nums[3:0];
digit <= 4'b1110;
end
endcase
end else begin
display_num <= display_num;
digit <= digit;
end
end
always @ (*) begin
case (display_num)
0 : display = 7'b1000000; //0000
1 : display = 7'b1111001; //0001
2 : display = 7'b0100100; //0010
3 : display = 7'b0110000; //0011
4 : display = 7'b0011001; //0100
5 : display = 7'b0010010; //0101
6 : display = 7'b0000010; //0110
7 : display = 7'b1111000; //0111
8 : display = 7'b0000000; //1000
9 : display = 7'b0010000; //1001
default : display = 7'b1111111;
endcase endcase
end end
always @(*) begin
case (digit)
4'h0: seg_inv = 7'b0111111;
4'h1: seg_inv = 7'b0000110;
4'h2: seg_inv = 7'b1011011;
4'h3: seg_inv = 7'b1001111;
4'h4: seg_inv = 7'b1100110;
4'h5: seg_inv = 7'b1101101;
4'h6: seg_inv = 7'b1111101;
4'h7: seg_inv = 7'b0000111;
4'h8: seg_inv = 7'b1111111;
4'h9: seg_inv = 7'b1101111;
4'ha: seg_inv = 7'b1110111;
4'hb: seg_inv = 7'b1111100;
4'hc: seg_inv = 7'b0111001;
4'hd: seg_inv = 7'b1011110;
4'he: seg_inv = 7'b1111001;
4'hf: seg_inv = 7'b1110001;
default: seg_inv = 7'b0000000;
endcase
end
assign seg = ~seg_inv;
assign seg_en = {(signal[15:8] == 8'hE0 ? 2'b11 : 2'b00), 2'b11};
assign seg_an = ~(seg_en & (4'b1 << cnt));
endmodule endmodule